Hardware acceleration

Computer-Use 2.0: Agents Just Got Multi-Cursor — Francesco Bonacci, Cua

Computer-Use 2.0: Agents Just Got Multi-Cursor — Francesco Bonacci, Cua

This talk introduces cua driver, an open-source tool enabling AI agents to interact with computer GUIs in the background across macOS, Windows, and Linux by leveraging accessibility APIs. It details CUABench, a robust evaluation framework with over 130 verifiable tasks designed to benchmark and ensure the trustworthiness of computer-using agents, revealing current limitations in complex tasks like circuit design. Finally, it presents cua fleet, an infrastructure solution that optimizes GPU utilization and reduces costs for RL training of these agents by dynamically managing sandbox environments.

State of the Union: Why Local, Why Now — NVIDIA, Osmantic, Roboflow, EXO Labs, @matthew_berman

State of the Union: Why Local, Why Now — NVIDIA, Osmantic, Roboflow, EXO Labs, @matthew_berman

This panel discussion explores the inflection point of Local AI, driven by advanced models, improved hardware, and a robust ecosystem. Experts discuss how this shift addresses critical concerns around privacy, cost, sovereignty, and resilience, emphasizing the pivotal role of open-source AI and specialized models. They delve into technical optimizations, the evolution from generalized to specialized AI, and the challenges of making local AI accessible and performant for both enterprise and individual users.

Accelerating AI on Edge — Chintan Parikh and Weiyi Wang, Google DeepMind

Accelerating AI on Edge — Chintan Parikh and Weiyi Wang, Google DeepMind

A deep dive into Google's AI Edge stack for on-device AI, covering the new Gemma 4 models, the LiteRT framework for cross-platform deployment, and practical use cases in agent skills, tool calling, and hardware acceleration on CPUs, GPUs, and NPUs.

CROSS — Leveraging AI ASICs for Homomorphic Encryption

CROSS — Leveraging AI ASICs for Homomorphic Encryption

The talk presents CROSS and Morph, two compiler frameworks that enable existing AI accelerators, like Google's TPUs, to efficiently execute cryptographic workloads. CROSS focuses on Homomorphic Encryption (HE) and Morph on Zero-Knowledge Proofs (ZKP), demonstrating how to transform high-precision modular arithmetic into low-precision matrix operations that TPUs excel at, thereby achieving state-of-the-art performance and energy efficiency without any hardware modifications.

Hardware Realization and Implementation Security Evaluation of HQC, A NIST PQC Standard

Hardware Realization and Implementation Security Evaluation of HQC, A NIST PQC Standard

This talk by Sanjay Deshpande from Northwestern University explores the critical transition to Post-Quantum Cryptography (PQC) in response to the threat quantum computers pose to current public-key algorithms. It provides a deep dive into the Hamming Quasi-Cyclic (HQC) algorithm, a code-based candidate for NIST standardization. The session focuses on the challenges and innovations in creating efficient and secure hardware implementations of HQC, covering performance optimization for polynomial multiplication and countermeasures against side-channel attacks.

Efficient Homomorphic Integer Computer from CKKS

Efficient Homomorphic Integer Computer from CKKS

A deep dive into the hardware design and implementation of HQC, a post-quantum cryptography scheme. The talk covers performance and security bottlenecks, detailing novel solutions for efficient polynomial multiplication by leveraging sparsity and constant-time methods for generating fixed-weight vectors to thwart side-channel attacks.